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POWER9 Is Next Stop on IBM Power Road Map

Bradley McCredie
 

In 2017, IBM POWER9* systems will be the smartest, fastest and strongest yet. The new chips will have double the cores of POWER8* multiprocessors, among other game-changing features. And an open ecosystem of developers and designers can make the system even more powerful. To find out more about the POWER9 road map, IBM Systems Magazine sat down with Bradley McCredie, vice president, IBM Power Systems* development, and founding president of the OpenPOWER Foundation.

IBM Systems Magazine (ISM): What are some of the most exciting POWER9 innovations?
Bradley McCredie (BM):
We’ve invented a brand-new microarchitecture for our microprocessor and have entered into the 14-nanometer silicon on insulator process.

For the first time in the history of the POWER* architecture, we’re doing two versions of a chip: a scale-out (SO) model that addresses the Linux* scale-out marketplace and a scale-up (SU) model that addresses the UNIX* marketplace, which is currently our core business. So, now we have the cost optimizations you need to succeed in the Linux SO market along with high throughput and a 24-core POWER9 chip.

On the SU side, we continue to focus on the values we’ve had forever in our UNIX marketplace. We have a more robust memory subsystem, which provides huge memory capacity and bandwidth.

We’ve also invested in the I/O subsystem. The POWER9 chip will be the first to get to the ubiquitous I/O bus: Gen4 Peripheral Component Interconnect Express*. We’ll be to Gen4 before anyone else in the industry, and that’s going to create a lot of value for our clients. That new bus will have more bandwidth than all prior generations. It will get us to the next generation of the NVLink bus together with our partner, NVIDIA.

In addition, we’ve created a new Coherent Accelerator Processor Interface (CAPI) bus, which you’ll hear a lot more about in the near future. It will attach to advanced generations of new storage class memories, along with new accelerators, such as field programmable gate arrays. That innovation is important, considering where computers are going and the increasing role accelerators and advanced memories will play.

ISM: Why are these accelerators so important?
BM:
Accelerators and advanced memories are one of the hottest trends in system design. We’re seeing more workloads exploiting these technologies. The easiest examples to point to are machine learning and deep learning artificial intelligence workloads.

Technology scaling is making it harder for general-purpose processors to deliver the usual cost and performance gains they’ve delivered historically. So, they’re going to need help from external to the processor devices to deliver historic levels of cost-performance improvements.

We’ve started to see this trend play out in high-performance computing, where accelerators are most commonly deployed today. However, in order for systems to truly deliver differentiated and better performance, they must be designed differently. They need advanced I/O busses with better bandwidth and latency features to deliver performance to the workload.

Eve Daniels is a Minneapolis-based freelance writer.



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